Motorola MVME2400 Series Wartungshandbuch PDF herunterladen (Seite 52)

100

101

1-32 Computer Group Literature Center Web Site

Board Description and Memory Maps

Slave Image 0 into the appropriate PCI I/O address range. Refer to the

VMEbus Slave Map section for additional details. The following table

shows the registers provided for various VME functions:

These registers are described in the following sub-sections.

LM/SIG Control Register

The LM/SIG Control Register is an 8-bit register located at ISA I/O

address x1000. This register provides a method to generate software

interrupts. The Universe II ASIC is programmed so that this register can

be accessed from the VMEbus to generate software interrupts to the

processor(s).

SET_SIG1 Writing a 1 to this bit will set the SIG1 status bit.

Table 1-17. VME Registers

PCI I/O Address Function

0000 1000 LM/SIG Control Register

0000 1001 LM/SIG Status Register

0000 1002 VMEbus Location Monitor Upper Base Address

0000 1003 VMEbus Location Monitor Lower Base Address

0000 1004 VMEbus Semaphore Register 1

0000 1005 VMEbus Semaphore Register 2

0000 1006 VMEbus Geographical Address Status

REG LM/SIG Control Register - Offset $1000

BIT SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0

FIELD SET

SIG1

SET

SIG0

SET

LM1

SET

LM0

CLR

SIG1

CLR

SIG0

CLR

LM1

CLR

LM0

OPER WRITE-ONLY

RESET 00000000

1 2 ... 47 48 49 50 51 52 53 54 55 56 57 ... 353 354

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