4-2 Computer Group Literature Center Web Site
Universe II (VMEbus to PCI) Chip
4
– A32/A24/A16 master and slave
– D64 (MBLT)/D32/D16/D08 master and slave
– BLT, ADOH, RMW, LOCK
❏ Automatic initialization for slave-only applications
❏ Flexible register set, programmable from both the PCI bus and
VMEbus ports
❏ Full VMEbus system controller functionality
❏ IEEE 1149.1 JTAG testability support, and
❏ Available in 313-pin Plastic BGA and 324-pin contact Ceramic
BGA
Functional Description
Architectural Overview
This section introduces the general architecture of the Universe II. This
description makes reference to the functional block diagram provided in
Figure 4-1 that follows. Notice that for each of the interfaces, VMEbus and
PCI bus, there are three functionally distinct modules: master module,
slave module, and interrupt module. These modules are connected to the
different functional channels operating in the Universe II. These channels
are:
❏ VME Slave Channel
❏ PCI Bus Slave Channel
❏ DMA Channel
❏ Interrupt Channel
❏ Register Channel
The Architectural Overview is organized into the following sections:
❏ VMEbus Interface
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