Programming Model
http://www.mcg.mot.com/literature 3-49
3
sien When sien is set, the logging of a single-bit error causes
the int
bit to be set if it is not already. When the int bit is
set, the Hawk’s internal SMC_INT signal to the MPIC is
asserted.
mien
When mien is set, the logging of a non-correctable error
causes the int
bit to be set if it is not already. When the int
bit is set, the Hawk’s internal SMC_INT signal to the
MPIC is asserted.
int
int is set when one of the SMC’s interrupt conditions
occurs. It is cleared by reset or by software writing a one
to it. The Hawk’s internal SMC_INT signal tracks int.
When int is set, SMC_INT is asserted. When int is
cleared, SMC_INT is negated.
mbe_me
When mbe_me is set, the detection of a multiple-bit error
during a PowerPC read or write to SDRAM causes the
SMC to pulse its machine check interrupt request pin
(MCHK0_) true. When mbe_me
is cleared, the SMC
does not assert its MCHK0_ pin on multiple-bit errors.
The SMC never asserts its MCHK0_ pin in response to a
multiple-bit error detected during a scrub cycle.
!
Caution
Note that the SMC_INT (internal signal) and the MCHK0_
pin are the only non-polled notification that a multiple-bit
error has occurred. The SMC does not assert TEA as a result
of a multiple bit error. In fact, the SMC does not have a TEA_
signal pin and it assumes that the system does not implement
TEA.
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