Motorola MVME2400 Series Wartungshandbuch Seite 103

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Functional Description
http://www.mcg.mot.com/literature 2-45
2
The PCI Master must make the determination to perform the resolution
function since it must make some decisions on possibly removing a
currently pending command from the PPC FIFO.
There are some performance issues related to bridge lock resolution. PHB
offers two mechanism that allow fine tuning of the bridge lock resolution
function.
Programmable Lock Resolution
Consider the scenario where the PPC Slave is hosting a read cycle and the
PCI Slave is hosting a posted write transaction. If both transactions happen
at roughly the same time, then the PPC Slave will hold off its transaction
until the PCI Slave can fill the PCI FIFO with write posted data. Once this
happens, both slaves will be stalled and a bridge lock resolution cycle will
happen. The effect of this was to make the PPC Slave waste PPC bus
bandwidth. In addition, a full PCI FIFO will cause the PCI Slave to start
issuing wait states to the PCI bus.
From the perspective of the PCI bus, a better solution would be to select a
PCI FIFO threshold that will allow the bridge lock resolution cycle to
happen early enough to keep the PCI FIFO from getting filled. A similar
case exists with regards to PCI read cycles. Having the bridge lock
resolution associated with a particular PCI FIFO threshold would allow the
PPC Master to get an early enough start at prefetching read data to keep the
PCI Slave from starving for read data.
From the perspective of the PPC bus, a selective FIFO threshold will make
the PPC Slave release the PPC bus at an earlier time thereby reducing
wasted PPC bus bandwidth. PHB offers an option to have the PPC Slave
remove a stalled transaction immediately upon detecting any PCI Slave
activity. This option would help in the case where distributing PPC60x bus
bandwidth between multiple masters is of utmost importance.
The PHB is tuned to provide the most efficient solution for bridge lock
resolution under normal operating conditions. If further fine tuning is
desired, the WLRT/RLRT (Write Lock Resolution Threshold/Read Lock
Resolution Threshold) fields within the HCSR can be adjusted
accordingly. Note that the FIFO full option exists mainly to remain
architecturally backwards compatible with previous bridge designs.
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