Motorola M68000 Betriebsanweisung PDF herunterladen (Seite 200)

186 Assembly Language Programming for the 68000 Family

Instruction Caching

Besides using full 32-bit operands both internally and via the data bus,

the 68020 gains additional performance improvement by introducing an

instruction cache. A cache is very similar to a small internal memory. Since

it is internal, it can operate at register speeds. This means that an access

to the cache takes less time than an access to the physical memory. The

cache on the 68020 is used to store instructions. If an instruction is found

in the cache there is no need to look for it in physical memory. There

is an additional benefit however; while the instruction is being fetched

from the cache, an operand can be accessed in memory. If this situation

occurs, then the instruction fetch is actually for free. This is because the

two accesses are overlapped.

The operation of the instruction cache is invisible to the programmer.

The cache is automatically updated according to an internal algorithm

in the CPU. The real advantage of the instruction cache comes into play

when a small loop is executed. If all the instructions of the loop will fit

into the instruction cache, once we have gone through the loop the first

time, the instruction fetches for each additional pass through the loop will

be from the instruction cache. The instruction cache on the 68020 is 256

bytes. This is enough to hold a significant number of instructions. Since

the length of an instruction varies from 2 to 10 bytes, it is not possible

to know the exact number of instructions that will fit in the cache, but

a rough estimate is around 50. Since most loops don’t involve more than

50 instructions, the instruction cache almost always speeds up loops. The

loop mode on the 68010 is a very limited version of the 68020 instruction

cache.

Figure 16 shows the operation of the 68020 instruction cache. The

cache stores 32-bit longwords that are aligned on even-word addresses.

Bits 2 through 7 of an address are used to index into the cache. This

allows 64 longwords to be stored in the cache. Bits 8 through 31 and the

high-order bit of the 3-bit function code are stored as a tag in the cache

entry along with the 32-bit value at that address. You will recall from

Chapter 13 that the function code specifies the address space. Only user

and supervisor program spaces are stored in the instruction cache. The

high-order bit of the function code determines which is which. If this bit

is set, it indicates a supervisor program address. The two lower-order bits

of the function code must be 10. Every address accessed by the CPU is

compared with the contents of the cache. The entry is selected by bits 2

through 7. If the tag field matches, then the data in the cache, rather than

a fetch to memory, is used. If the tag doesn’t match and the reference

is a program reference, then the actual memory location is accessed and

the cache is updated.

1 2 ... 195 196 197 198 199 200 201 202 203 204 205 ... 255 256

Kommentare zu diesen Handbüchern

Keine Kommentare

Motorola M68000 Betriebsanweisung Seite 200

Kommentare zu diesen Handbüchern

Verwandte Produkte und Handbücher für Nein Motorola M68000