Motorola MCU 68HC912D60 Bedienungsanleitung Seite 7

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68HC912D60MSE4 Rev 2 7
March 14, 2001
INT: EDGE SENSITIVE IRQ DOES NOT WORK CORRECTLY DURING STOP
AR528
When using an edge sensitive IRQ signal to trigger an interrupt service routine and
the IRQ is not released during servicing, the part will not enter stop mode if the
following executed instruction is STOP.
Work-
around
When IRQ is set to be edge sensitive, release pin before executing STOP
instruction.
Wait until the transmit buffer is empty (TDRE == 1) and then disable the
transmission (Set TE == 0).
INT: WAIT CANNOT BE EXITED IF XIRQ/IRQ LEVEL DEASSERTION OCCURS
WITHIN PARTICULAR WINDOW OF TIME AR600
The device can get trapped in WAIT mode if, on exiting the WAIT instruction, the
deassertion timing of the XIRQ or level-sensitive IRQ occurs within a particular
timeframe. Only reset will allow recovery. Noise/bounce on the pins could also
cause this problem.
Work-
around
1. Use edge-triggered IRQ (IRQE=1) instead of XIRQ or level-triggered IRQ.
2. Use RTI , timer interrupts, KWU or other interrupts (except level-sensitive
IRQ or XIRQ) to exit WAIT. If using RTI, it must be enabled in WAIT
(RSWAI=0) and the COP must be disabled (CME=0).
3. Assert XIRQ or level-sensitive IRQ until the interrupt subroutine is entered.
4. Add de-bouncing logic to prevent inadvertent highs when exiting WAIT.
INT: DISABLING INTERRUPT WITH I MASK BIT CLEAR CAN CAUSE SWI
AR527
If the source of an interrupt is taken away by disabling the interrupt without setting
the I mask bit in the CCR, an SWI interrupt may be fetched instead of the vector for
the interrupt source that was disabled.
Work-
around
Before disabling an interrupt using a local interrupt control bit, set the I mask bit in
the CCR.
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