Motorola MCU 68HC912D60 Bedienungsanleitung PDF herunterladen (Seite 3)

68HC912D60MSE4 Rev 2 3

March 14, 2001

BDM AR572

When the BDM module is using synchronized XTAL/2 (CLKSW=0) as its reference

clock and the PLL is providing the clock for the CPU bus (BCSP=1), data cannot

be read back correctly through the BDM. The chance of reading wrong data

increases when the bus frequency increases (with different PLL prescaler). All data

read will not be correct when the Bus frequency is near four times the XTAL

frequency. READ_W will return the requested address as data. READ_B will return

the upper and lower byte of address if the requested address is even and odd

respectively. Write through BDM is normal.

Work-

around

No customer workaround is available for this clock selection. However, CLKSW=0,

BCSP=0 (Supported by all bdm i/f software) and CLKSW=1, BCSP=1 (support is

unknown) combination are still ok.

BDM:

It is possible to lose BDM communication when executing long instructions, 11

cycles or more (IDIV, FDIV, EMACS, EDIVS, IDIVS), if the PLL is being used as

the SYSCLK source.

Work-

around

Do not use the PLL as SYSCLK source when using the BDM interface to debug

code that uses instructions taking ≥ 11 cycles, or insert a breakpoint before such

an instruction and single step over it before continuing code execution.

BKP: ADDRESS AND DATA REGISTERS RESET ONLY ON POR AR463

Breakpoint Address and Data registers are properly reset only upon Power on

Reset.

Work-

around

To ensure BRKAH, BRKAL, BRKDH and BRKDL registers have the correct default

values, always clear each immediately after reset.

CGM: CPU STOPS GOING INTO WAIT BEFORE STRETCHED CYCLE IS

FINISHED AR475

When the device exits WAIT mode, it does not return to the correct location within

the routine if the stack is positioned in external memory and if the stretch bits have

been enabled to lengthen the clock.

Work-

around

To overcome this problem, locate the stack in internal RAM resources and/or clear

the stretch bits to prevent clock stretching.

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Motorola MCU 68HC912D60 Bedienungsanleitung Seite 3