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SPRS292A − OCTOBER 2005 − REVISED NOVEMBER 2005

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443

SYNCHRONOUS DRAM TIMING (CONTINUED)

ECLKOUT

CEx

BE[3:0]

EA[11:2]

ED[31:0]

AOE/SDRAS/SSOE

†

ARE

/SDCAS/SSADS

†

AWE

/SDWE/SSWE

†

EA12

EA[21:13]

BE1 BE2 BE3 BE4

Bank

Column

D1 D2 D3 D4

WRITE

†

ARE

/SDCAS/SSADS, AWE/SDWE/SSWE, and AOE/SDRAS/SSOE operate as SDCAS, SDWE, and SDRAS, respectively, during SDRAM

accesses.

Figure 32. SDRAM Write Command

1 2 ... 73 74 75 76 77 78 79 80 81 82 83 ... 106 107

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