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Connector Pin Assignments
http://www.mcg.mot.com/literature C-17
C
33 GND AD48 34 33 PMC1_33 (P2-C17) PMC1_34 (P2-A17) 34
35 AD47 AD46 36 35 PMC1_35 (P2-C18) PMC1_36 (P2-A18) 36
37 AD45 GND 38 37 PMC1_37 (P2-C19) PMC1_38 (P2-A19) 38
39 +5V (Vio) AD44 40 39 PMC1_39 (P2-C20) PMC1_40 (P2-A20) 40
41 AD43 AD42 42 41 PMC1_41 (P2-C21) PMC1_42 (P2-A21) 42
43 AD41 GND 44 43 PMC1_43 (P2-C22) PMC1_44 (P2-A22) 44
45 GND AD40 46 45 PMC1_45 (P2-C23) PMC1_46 (P2-A23) 46
47 AD39 AD38 48 47 PMC1_47 (P2-C24) PMC1_48 (P2-A24) 48
49 AD37 GND 50 49 PMC1_49 (P2-C25) PMC1_50 (P2-A25) 50
51 GND AD36 52 51 PMC1_51 (P2-C26) PMC1_52 (P2-A26) 52
53 AD35 AD34 54 53 PMC1_53 (P2-C27) PMC1_54 (P2-A27) 54
55 AD33 GND 56 55 PMC1_55 (P2-C28) PMC1_56 (P2-A28) 56
57 +5V (Vio) AD32 58 57 PMC1_57 (P2-C29) PMC1_58 (P2-A29) 58
59 Reserved Reserved 60 59 PMC1_59 (P2-C30) PMC1_60 (P2-A30) 60
61 Reserved GND 62 61 PMC1_61 (P2-C31) PMC1_62 (P2-A31) 62
63 GND Reserved 64 63 PMC1_63 (P2-C32) PMC1_64 (P2-A32) 64
Table C-8. J13 - J14 PMC1 Connector Pin Assignments (Continued)
- MVME2400-Series 1
- Single Board Computer 1
- Installation and Use 1
- Restricted Rights Legend 2
- Document Terminology 4
- Safety Summary 5
- Safety Depends On You 5
- Contents 9
- Glossary 12
- List of Figures 13
- List of Tables 15
- 1Preparing and Installing the 17
- MVME2400-Series Module 17
- MVME240x Module 18
- PMCspan Expansion Mezzanine 19
- PCI Mezzanine Cards (PMCs) 19
- VMEsystem Enclosure 20
- System Console Terminal 20
- 1 2 3 4 5 6 7 8 25
- ESD Precautions 29
- 2064 9708 31
- Primary PMCspan 32
- 2081 9708 33
- Secondary PMCspan 34
- 2065 9708 35
- INTERRUPT ACKNOWLEDGE 38
- DEBUG port on 38
- Installation Considerations 39
- 2Operating Instructions 41
- Switches 42
- MVME240x 43
- Status Indicators 44
- 10/100 BASET Port 44
- DEBUG Port 45
- Operating Instructions 46
- PMC Slots 47
- 3Functional Description 49
- (RST) and Abort (ABT) 50
- General Description 52
- Block Diagram 52
- (PHB) ASIC 55
- PCI Bus Latency 56
- 3:1 clock ratio: 56
- PPC Bus Latency 58
- Assumptions 60
- SDRAM Memory 62
- Functional Description 66
- Flash Memory 67
- Ethernet Interface 70
- VMEbus Interface 73
- Asynchronous Debug Port 73
- PCI Host Bridge (PHB) 75
- Interrupt Controller (MPIC) 76
- Programmable Timers 76
- 4Programming the MVME240x 79
- Processor Bus Memory Map 80
- PCI Local Bus Memory Map 81
- VMEbus Memory Map 81
- Programming Considerations 82
- Interrupt Handling 84
- DMA Channels 86
- Sources of Reset 86
- Endian Issues 88
- Programming the MVME240x 90
- PPCBug Overview 91
- PPCBug Basics 91
- Diag> 92
- Memory Requirements 93
- PPCBug Implementation 93
- Debugger Commands 96
- Table 5-1. Debugger Commands 97
- Diagnostic Tests 100
- Using PPCBug 101
- 6Modifying the Environment 103
- Modifying the Environment 104
- ENV - Set Environment 105
- ∗ signal after 107
- ∗ signal during board 107
- 00001000? 111
- (Default) 112
- Ordering Related 119
- Documentation 119
- Manufacturers’ Documents 120
- Document Title and Source 121
- Publication 121
- Related Specifications 123
- Specifications 127
- Table B-1. MVME240 128
- Specifications (Continued) 128
- Cooling Requirements 129
- EMC Regulatory Compliance 130
- CConnector Pin Assignments 131
- VMEbus Connector - P1 132
- Connector Pin Assignments 133
- VMEbus Connector - P2 134
- Pin Assignments 136
- CPU Debug Connector - J1 137
- PCI Expansion Connector - J6 142
- DTroubleshooting the MVME240x 151
- Solving Startup Problems 152
- Troubleshooting the MVME240x 153
- Numerics 169
- Single Board Computer 177
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