Motorola CPU32 Bedienungsanleitung PDF herunterladen (Seite 519)

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Supervisor (Privileged) Instructions

MOTOROLA M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL 6-65

PTEST Test a Logical Address PTEST

(MC68030 only)

The MMU status register contains the results of the search. The values in the fields of

the MMU status register for an address translation cache search are given in the fol-

lowing table:

MMUSR Bit PTEST, Level 0 PTEST, Levels 1–7

Bus Error (B) This bit is set if the bus error bit is set in the

ATC entry for the specified logical address.

This bit is set if a bus error is encountered

during the table search for the PTEST in-

struction.

Limit (L) This bit is cleared. This bit is set if an index exceeds a limit

during the table search.

Supervis or

Violatio n (S)

This bit is cleared. This bit is set if the S-bit of a long (S) format

table descriptor or long format page de-

scriptor encountered during the search is

set and if the FC2-bit of the function code

specified by the PTEST instruction is not

equal to one. The S-bit is undefined if the I-

bit is set.

Write

Protecte d (W)

The bit is set if the WP-bit of the ATC entry

is set. It is undefined if the I-bit is set.

This bit is set if a descriptor or page de-

scriptor is encountered with the WP-bit set

during the table search. The W-bit is unde-

fined if the I-bit is set.

Invalid (I) This bit indicates an invalid translation. The

I- bit is set if the translation for the specified

logical address is not resident in the ATC

or if the B-bit of the corresponding ATC en-

try is set.

This bit indicates an invalid translation. The

I-bit is set if the DT field of a table or a page

descriptor encountered during the search

is set to invalid or if either the B or L bits of

the MMUSR are set during the table

search.

Modified (M) This bit is set if the ATC entry correspond-

ing to the specified address has the modi-

fied bit set. It is undefined if the I-bit is set.

This bit is set if the page descriptor for the

specified address has the modified bit set.

It is undefined if I-bit is set.

Transparent (T) This bit is set if a match occurred in either

(or both) of the transparent translation reg-

isters (TT0 or TT1).

This bit is set to zero.

Number of

Levels (N)

This 3-bit field is set to zero. This 3-bit field contains the actual number

of tables accessed during the search.

1 2 ... 514 515 516 517 518 519 520 521 522 523 524 ... 645 646

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