Motorola MC68306 Betriebsanweisung PDF herunterladen (Seite 48)

Unexecuted Prefetched Instructions

The preprocessor interface sends all of the bus transactions by both the

microprocessor and coprocessor to the logic analyzer. Prefetched

instructions which are not executed by the microprocessor are marked by a

hyphen "-".

In some cases, it is impossible to determine from bus activity whether a

branch is taken or a prefetch is executed. In these cases, the inverse

assembler marks the disassembled line with the prefix "?".

IA68306 Processor-Specific Output Format

This section discusses issues specific to the IA68306 inverse assembler.

Bus Arbitration

Use of two-wire bus arbitration may cause the inverse assembler to

incorrectly disassemble state information. See the "Theory of Operation and

Clocking" section in Chapter 3 for more information.

PC-based Addressing Modes

The microprocessor may occasionally make an operand fetch from program

space when program-counter-based (PC-based) addressing modes are used.

MOVE.L 0[PC,D0.L],D7

When this occurs, the resulting memory read is classified as a program

reference by the microprocessor, and the Function Code lines are driven

accordingly (they indicate a program read rather than a data read).

When the inverse assembler detects an instruction of this type, it will attempt

to locate the operand fetch and tag it so that it will not be disassembled.

Instead, it will be classified as "program data" by the inverse assembler and

displayed in hexadecimal format.

Analyzing the Motorola MC68306

To display captured state data

MC68306 Preprocessor 2–11

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Motorola MC68306 Betriebsanweisung Seite 48