Motorola Laptop IH5 Bedienungsanleitung

MCPN750A CompactPCISingle Board Computer Installation and UseMCPN750A/IH5September 2001 Edition

xISA DMA Channels ...6-10Interval Timers...

5-10 Computer Group Literature Center Web SiteRemote Start Via the PCI Bus500040100 0B? .<cr>PPC1-Bug>Enter the program to be executed by the

Introductionhttp://www.motorola.com/computer/literature 5-115PPC1-Bug>m 8000EFC4<cr>8000EFC4 08030086? 00008007=<cr>8000EFC4 00000007?

5-12 Computer Group Literature Center Web SiteRemote Start Via the PCI Bus5Reference Function: srom_crc.c/* * srom_crc - generate CRC data for the pas

Introductionhttp://www.motorola.com/computer/literature 5-135 crc_flipped <<= 1; dbit = crc & 1; crc >>= 1; crc_fl

5-14 Computer Group Literature Center Web SiteRemote Start Via the PCI Bus5

6-166Functional DescriptionIntroductionThis chapter describes the MCPN750A single-board computer on a block diagram level. The General Description pro

6-2 Computer Group Literature Center Web SiteFunctional Description6General DescriptionThe MCPN750A is a hot swappable CompactPCI, non-system slot, si

Block Diagramhttp://www.motorola.com/computer/literature 6-36The MCPN750A interfaces to a CompactPCI bus using a DEC 21554 non-transparent PCI-to-PCI

6-4 Computer Group Literature Center Web SiteFunctional Description6Figure 6-1. MCPN750A Block DiagramNVRAM/WD/RTC66MHz PPC603 Processor Bus33MHz 32/

Block Diagramhttp://www.motorola.com/computer/literature 6-56CompactPCI Bus InterfaceThe CompactPCI bus interface is provided using the Intel 21554 no

xiTMCPN710 Transition Module COM1 Connector (J6)...7-19TMCPN710 Transition Module COM2 Connector (J8)...

6-6 Computer Group Literature Center Web SiteFunctional Description6Ethernet InterfaceMCPN750A provides an Ethernet interface via the 21143 device. Th

Block Diagramhttp://www.motorola.com/computer/literature 6-76PCI Mezzanine InterfaceA key feature of the MCPN750A family is the PCI (Peripheral Compon

6-8 Computer Group Literature Center Web SiteFunctional Description6ISA Bus DevicesThe MCPN750A contains a local ISA bus to provide an interface to IS

Block Diagramhttp://www.motorola.com/computer/literature 6-96PCI Peripheral Bus Controller (PBC)The MCPN750A uses the VIA Technologies VT82C586B Perip

6-10 Computer Group Literature Center Web SiteFunctional Description6EIDE InterfaceThe PBC EIDE interface is capable of accelerated PIO transfers as w

Block Diagramhttp://www.motorola.com/computer/literature 6-116Interval TimersThe PBC has three built-in counters that are equivalent to those found in

6-12 Computer Group Literature Center Web SiteFunctional Description6The clock furnishes seconds, minutes, hours, day, date, month, and year in BCD 24

Block Diagramhttp://www.motorola.com/computer/literature 6-136❏ Do not disassemble, deform, or apply excessive pressure.❏ Do not heat or incinerate.❏

6-14 Computer Group Literature Center Web SiteFunctional Description6Hot Swap Control CircuitryThe MCPN750A provides CompactPCI Hot Swap capability an

Block Diagramhttp://www.motorola.com/computer/literature 6-156Raven Watchdog TimersThe Raven ASIC contains two Watchdog timers, WDT1 and WDT2. Each ti

xii

6-16 Computer Group Literature Center Web SiteFunctional Description6Interval TimersThe PBC has three built-in counters that are equivalent to those f

Block Diagramhttp://www.motorola.com/computer/literature 6-176Figure 6-2. Serial Port Signal MultiplexingI/O Signal Multiplexing (IOMX)There are four

6-18 Computer Group Literature Center Web SiteFunctional Description6The MX function is implemented using PALs and some discrete devices. MXSYNC# is c

Block Diagramhttp://www.motorola.com/computer/literature 6-196Figure 6-3. MX Signal TimingsSignal DescriptionsSerial Ports Defined:CTSn - clear to se

6-20 Computer Group Literature Center Web SiteFunctional Description6Front Panel Indicators (DS1 - DS3)There are three LEDs on the MCPN750A front pane

Block Diagramhttp://www.motorola.com/computer/literature 6-216The MCPN750A also contains four 16-bit Smart Voltage FLASH SMT devices (Intel Part #E28F

6-22 Computer Group Literature Center Web SiteFunctional Description6ECC Memory ControllerECC memory is provided by onboard DRAM devices. The DRAM mem

Block Diagramhttp://www.motorola.com/computer/literature 6-236TMCPN710 Transition ModuleThe TMCPN710 transition module is used in conjunction with all

6-24 Computer Group Literature Center Web SiteFunctional Description6❏ One standard 50-pin CompactFlash socket for IDE FlashFor additional information

7-177Connector Pin AssignmentsMCPN750A and Transition Module ConnectorsThis chapter summarizes the pin assignments for the following groups of interco

xiiiList of FiguresFigure 1-1. MCPN750A Base Board Block Diagram...1-2Figure 1-2. MCPN750A Switches, Head

7-2 Computer Group Literature Center Web SiteConnector Pin Assignments7MCPN750A Connector Pin AssignmentsThe following tables describe connectors used

MCPN750A Connector Pin Assignmentshttp://www.motorola.com/computer/literature 7-3710 AD21 GND +3.3V AD20 AD19 109 CBE3_L IDSEL AD23GND AD22 98 AD26 GN

7-4 Computer Group Literature Center Web SiteConnector Pin Assignments7MCPN750A CompactPCI User I/O Connector J3Connector J3 is a 110 pin AMP Z-pack 2

MCPN750A Connector Pin Assignmentshttp://www.motorola.com/computer/literature 7-57Signal DescriptionsPMCIO:PMC1IO(1:64) - PMC1 I/O signals 1 through 6

7-6 Computer Group Literature Center Web SiteConnector Pin Assignments7Serial COM Ports 1-4:COMnTD - COM Port n Transmit Data OutputCOMnRD - COM Port

MCPN750A Connector Pin Assignmentshttp://www.motorola.com/computer/literature 7-77MCPN750A CompactPCI User I/O Connector (J5)Connector J5 is a 110 pin

7-8 Computer Group Literature Center Web SiteConnector Pin Assignments7Signal DescriptionsPMCIO:PMC2IO (1:64) - PMC 2 I/O signals 1 through 64EIDE Pri

MCPN750A Connector Pin Assignmentshttp://www.motorola.com/computer/literature 7-97MCPN750A PCI Mezzanine Card Connectors (J11/21, J12/22, J13/23, J14/

7-10 Computer Group Literature Center Web SiteConnector Pin Assignments747 AD12 AD11 48 47 GND AD10 4849 AD09 +5V 50 49 AD08 +3.3V 5051 GND C/BE0# 52

MCPN750A Connector Pin Assignmentshttp://www.motorola.com/computer/literature 7-11735 AD47 AD46 36 35 PMCIO35 PMCIO36 3637 AD45 GND 38 37 PMCIO37 PMCI

xiv

7-12 Computer Group Literature Center Web SiteConnector Pin Assignments7MCPN750A 10BaseT/100BaseTx Connector (J18)The 10BaseT/100BaseTx Connector is a

MCPN750A Connector Pin Assignmentshttp://www.motorola.com/computer/literature 7-137Table 7-8. MCPN750A Debug Connector (J19)1 PA0 PA1 23 PA2 PA3 45 P

7-14 Computer Group Literature Center Web SiteConnector Pin Assignments759 PA20 PD21 6061 PD22 PD23 6263 PD24 PD25 6465 PD26 PD27 6667 PD28 PD29 6869

MCPN750A Connector Pin Assignmentshttp://www.motorola.com/computer/literature 7-157119 TT2 TSIZ2 120121 TT3 No Connection 122123 TT4 No Connection 124

7-16 Computer Group Literature Center Web SiteConnector Pin Assignments7153 CPUREQ1# INT0 154155 CPUGNT1# MCHK0#156157 INT1#/ WDT1TO#SMI#158159 MCPI1#

MCPN750A Connector Pin Assignmentshttp://www.motorola.com/computer/literature 7-177MCPN750A Processor RISCWatch Debug Connector (J6)A 15-pin header (J

7-18 Computer Group Literature Center Web SiteConnector Pin Assignments7TMCPN710 Transition ModuleThe following tables summarize the pin assignments o

TMCPN710 Transition Modulehttp://www.motorola.com/computer/literature 7-197TMCPN710 Transition Module COM1 Connector (J6)An RJ45 connector is located

7-20 Computer Group Literature Center Web SiteConnector Pin Assignments7TMCPN710 Transition Module COM2 Connector (J8)An RJ45 connector is located on

TMCPN710 Transition Modulehttp://www.motorola.com/computer/literature 7-217TMCPN710 Transition Module COM4 Header (J14)Same as above.19 NC NC 2021 NC

xvList of TablesTable 1-1. Startup Overview...1-3Table 1-2. Install

7-22 Computer Group Literature Center Web SiteConnector Pin Assignments7TMCPN710 Transition Module 10BaseT/100BaseTx Connector (J13)The 10BaseT/100Bas

TMCPN710 Transition Modulehttp://www.motorola.com/computer/literature 7-237TMCPN710 Transition Module USB Connectors (J10, J12)Two USB Series A recept

7-24 Computer Group Literature Center Web SiteConnector Pin Assignments7Table 7-16. TMCPN710 Compact FLASH IDE Connectors1 GND DD3 23 DD4 DD5 45 DD6

TMCPN710 Transition Modulehttp://www.motorola.com/computer/literature 7-257TMCPN710 Transition Module PMC I/O Connectors (J1/J2)Two 68-pin .08 Series

7-26 Computer Group Literature Center Web SiteConnector Pin Assignments725 PMCIO22 PMCIO55 5926 PMCIO23 PMCIO56 6027 PMCIO24 PMCIO57 6128 PMCIO25 PMCI

TM-PIMC-0001 Transition Modulehttp://www.motorola.com/computer/literature 7-277TM-PIMC-0001 Transition ModuleThe following tables summarize the pin as

7-28 Computer Group Literature Center Web SiteConnector Pin Assignments7TM-PIMC-0001 Transition Module COM1 Connector (J9)An RJ-45 connector is locate

TM-PIMC-0001 Transition Modulehttp://www.motorola.com/computer/literature 7-297TM-PIMC-0001 Transition Module COM2 Connector (J8)An RJ-45 connector is

7-30 Computer Group Literature Center Web SiteConnector Pin Assignments7TM-PIMC-0001 Transition Module COM3 and COM4 Connectors (J12 & J13)The sig

TM-PIMC-0001 Transition Modulehttp://www.motorola.com/computer/literature 7-317TM-PIMC-0001 Transition Module 10BaseT/100BaseTx Connector (J7)The 10Ba

xviTable 7-25. PMC I/O Modules 1 and 2 (PIM1 and PIM2) - PMC I/O Connector Pin Assignments...

7-32 Computer Group Literature Center Web SiteConnector Pin Assignments7connected to the Primary IDE channel. Connector J1 is configured as the Master

TM-PIMC-0001 Transition Modulehttp://www.motorola.com/computer/literature 7-337TM-PIMC-0001 Transition Module PMC I/O Connectors (J10, J20, and J14/J2

7-34 Computer Group Literature Center Web SiteConnector Pin Assignments743 Reserved USB0_DATAN 4445 GND USB0_DATAP 4647 USB1_VOK USB0_VOK 4849 USB1_DA

TM-PIMC-0001 Transition Modulehttp://www.motorola.com/computer/literature 7-357Note PMC I/O modules only use power, ground and the OUT-going serial po

7-36 Computer Group Literature Center Web SiteConnector Pin Assignments7Table 7-25. PMC I/O Modules 1 and 2 (PIM1 and PIM2) - PMC I/O Connector Pin A

TM-PIMC-0001 Transition Modulehttp://www.motorola.com/computer/literature 7-377Note Pin meaning for the PMC I/O connector is defined entirely by the P

7-38 Computer Group Literature Center Web SiteConnector Pin Assignments7

AA-1ASpecificationsSpecificationsTable A-1 lists the general specifications for MCPN750A base boards. Subsequent sections detail cooling requirements

A-2 Computer Group Literature Center Web SiteSpecificationsACooling RequirementsThe Motorola MCPN750A family of Single Board Computers is specified, d

EMC Compliancehttp://www.motorola.com/computer/literature A-3AEMC ComplianceThe MCPN750A Single Board Computer was tested in an EMC-compliant chassis

xviiAbout This ManualThis manual, MCPN750A CompactPCI Single Board Computer Installation and Use (MCPN750A/IH5) provides general information, hardware

A-4 Computer Group Literature Center Web SiteSpecificationsA

BB-1BRelated DocumentationMotorola Computer Group DocumentsThe Motorola publications listed below are referenced in this manual. You can obtain paper

B-2 Computer Group Literature Center Web SiteRelated DocumentationBManufacturers’ DocumentsFor specific component or software information, refer to th

Manufacturers’ Documentshttp://www.motorola.com/computer/literature B-3BIntel 21143 PCI Fast Ethernet LAN ControllerHardware Reference Manualhttp://de

B-4 Computer Group Literature Center Web SiteRelated DocumentationBRelated SpecificationsFor additional information, refer to the following table for

Related Specificationshttp://www.motorola.com/computer/literature B-5BPowerPCTM Microprocessor Common Hardware Reference Platform: A System Architectu

B-6 Computer Group Literature Center Web SiteRelated DocumentationBCompact PCI SpecificationPCI-to-PCI Bridge SpecificationPCI-ISA SpecificationCompac

IN-1IndexNumerics10/100BaseT connectorfor TMCPN710 7-2210BaseT/100BaseT connector 7-1216C550C UART deviceas asynchronous serial port 6-821554address d

IndexIN-2 Computer Group Literature Center Web SiteINDEXchanging 4-1chassis rails, grounding A-3Checksum Memoryremote start 5-6clocksfor system 2-6CNF

http://www.mcg.mot.com/literature IN-3INDEXremote start 5-7DEC21143ethernet interface 6-6default mapPCI/ISA I/O 2-4default memory mapdefined 2-3device

xviiiSummary of ChangesThe following is a list of changes made since the last release of this manual.Overview of ContentsThis section provides a brief

IndexIN-4 Computer Group Literature Center Web SiteINDEXhot swap considerations 1-24hot swap function 6-14hot swap removalcautions 1-22hot swap switch

http://www.mcg.mot.com/literature IN-5INDEXJ4 transition module connector 7-18J5 connector 7-7for TM-PIMC-0001 7-27MCPN750A 7-7J5 transition module co

IndexIN-6 Computer Group Literature Center Web SiteINDEXNNETboot enable 4-7Network Auto Boot enable 4-7NIOT commandrestrictions 4-8Non-Volatile RAM (N

http://www.mcg.mot.com/literature IN-7INDEXAuto-Initialize of NVRAM Header En-able 4-4Bug or System explained 4-3DRAM Parity Enable 4-10DRAM Speed in

IndexIN-8 Computer Group Literature Center Web SiteINDEXRF emissions A-3minimized on TMCPN710 1-29proper grounding 1-25RJ45 connectoron serial ports 1

http://www.mcg.mot.com/literature IN-9INDEXVvoltageMCPN750A 1-31VT82C586B Peripheral Bus Controller 6-9WWatchdog timeras part of M48T559 6-15as reset

IndexIN-10 Computer Group Literature Center Web SiteINDEX

xixChapter 4, CNFG and ENV Commands, provides an explanation of two of the more important PPCBug configuration commands: CNFG and ENV. Includes inform

© Copyright 2001 Motorola, Inc.All Rights Reserved.Printed in the United States of America.Motorola and the stylized M logo are registered trademarks

xxIn all your correspondence, please list your name, position, and company. Be sure to include the title and part number of the manual and tell how yo

1-111Hardware Preparation andInstallationIntroductionThis chapter provides startup and safety instructions related to this product, hardware preparati

1-2 Computer Group Literature Center Web SiteHardware Preparation and Installation1Figure 1-1. MCPN750A Baseboard Block DiagramNVRAM/WD/RTC66MHz PPC6

Getting Startedhttp://www.motorola.com/computer/literature 1-31Getting StartedThis section provides an overview of the steps necessary to install and

1-4 Computer Group Literature Center Web SiteHardware Preparation and Installation1Equipment RequiredThe following equipment is required to complete a

Getting Startedhttp://www.motorola.com/computer/literature 1-51Unpacking InstructionsNote If the shipping carton is damaged upon receipt, request that

1-6 Computer Group Literature Center Web SiteHardware Preparation and Installation1PreparationThis section discusses certain hardware and software tas

Preparationhttp://www.motorola.com/computer/literature 1-71The MCPN750A is factory tested and shipped with the configurations described in the followi

1-8 Computer Group Literature Center Web SiteHardware Preparation and Installation1Stand-Alone Operating Mode (J8)The MCPN750A has a stand-alone opera

Preparationhttp://www.motorola.com/computer/literature 1-91Figure 1-2. MCPN750A Switches, Headers, Connectors, Fuses, LEDs2703 000210/100 BASE T2ABT/

Safety SummaryThe following general safety precautions must be observed during all phases of operation, service, and repair of thisequipment. Failure

1-10 Computer Group Literature Center Web SiteHardware Preparation and Installation1System ConsiderationsThe MCPN750A is designed to operate as a Comp

Preparationhttp://www.motorola.com/computer/literature 1-111TMCPN710 Transition Module PreparationThe TMCPN710 transition module (Figure 1-3) is used

1-12 Computer Group Literature Center Web SiteHardware Preparation and Installation1Figure 1-3. TMCPN710 Connector and Header Locations2286 9806COM 2

Preparationhttp://www.motorola.com/computer/literature 1-131Serial Ports 1 and 2On the TMCPN710, the asynchronous serial ports (Serial Ports 1 and 2)

1-14 Computer Group Literature Center Web SiteHardware Preparation and Installation1 Figure 1-4. MCPN750A/TMCPN710 Serial Ports 1 and 22362 9808SOUTS

Preparationhttp://www.motorola.com/computer/literature 1-151COM3 and COM4 Asynchronous Serial PortsThe signals for COM3 and COM4 serial ports are rout

1-16 Computer Group Literature Center Web SiteHardware Preparation and Installation1TM-PIMC-0001 Transition Module PreparationThe TM-PIMC-0001 transit

Preparationhttp://www.motorola.com/computer/literature 1-171Figure 1-6. TM-PIMC-0001 Connector and Header LocationsJ882712694 0001COM 231COM 181J16J3

1-18 Computer Group Literature Center Web SiteHardware Preparation and Installation1COM1 and COM2 Asynchronous Serial PortsOn the TM-PIMC-0001, the as

Preparationhttp://www.motorola.com/computer/literature 1-191Figure 1-7. MCPN750A/TM-PIMC-0001 Serial Ports 1 and 22362 0001SOUTSINRTSCTSRIDTRDCDDSR16

FlammabilityAll Motorola PWBs (printed wiring boards) are manufactured with a flammability rating of 94V-0 by UL-recognized manufacturers.EMI Caution!

1-20 Computer Group Literature Center Web SiteHardware Preparation and Installation1COM3 and COM4 Asynchronous Serial PortsThe signals for COM3 and CO

Hardware Installationhttp://www.motorola.com/computer/literature 1-211Hardware InstallationThe following sections discuss the placement of PMC mezzani

1-22 Computer Group Literature Center Web SiteHardware Preparation and Installation13. Remove chassis or system cover(s) as necessary for access to th

Hardware Installationhttp://www.motorola.com/computer/literature 1-231!CautionAvoid touching areas of integrated circuitry; static discharge can damag

1-24 Computer Group Literature Center Web SiteHardware Preparation and Installation1Installing the MCPN750A BaseboardWith mezzanine board(s) installed

Hardware Installationhttp://www.motorola.com/computer/literature 1-251!CautionAvoid touching areas of integrated circuitry; static discharge can damag

1-26 Computer Group Literature Center Web SiteHardware Preparation and Installation1Installing a TMCPN710 or TM-PIMC-0001 Transition ModuleThe TMCPN71

Hardware Installationhttp://www.motorola.com/computer/literature 1-271Figure 1-10. Installing a PIM on the TM-PIMC-0001 Transition Module!CautionInse

1-28 Computer Group Literature Center Web SiteHardware Preparation and Installation1!WarningDangerous voltages, capable of causing death, are present

Hardware Installationhttp://www.motorola.com/computer/literature 1-291!WarningDangerous voltages, capable of causing death, are present in this equipm

CE Notice (European Community)!WarningThis is a Class A product. In a domestic environment, this product may cause radio interference, in which case t

1-30 Computer Group Literature Center Web SiteHardware Preparation and Installation1Figure 1-11. TMCPN710 or TM-PIMC-0001/MCPN750A Mating Configurati

MCPN750A Module Power Requirementshttp://www.motorola.com/computer/literature 1-311MCPN750A Module Power RequirementsThe MCPN750A board draws +5V, +3.

1-32 Computer Group Literature Center Web SiteHardware Preparation and Installation1

2-122Startup and OperationIntroductionThis chapter supplies information for use of the MCPN750A family of Single Board Computers in a system configura

2-2 Computer Group Literature Center Web SiteStartup and Operation2Figure 2-1. PPCBug System StartupThe MCPN750A front panel has one ABORT/RESET swit

Memory Mapshttp://www.motorola.com/computer/literature 2-32Memory MapsThere are three points of view for memory maps:❏ The mapping of all resources as

2-4 Computer Group Literature Center Web SiteStartup and Operation2Notes 1. Default map for PCI/ISA I/O space. Allows software to determine whether th

Memory Mapshttp://www.motorola.com/computer/literature 2-52For detailed PCI memory maps, including suggested PREP-compatible memory maps, refer to the

2-6 Computer Group Literature Center Web SiteStartup and Operation2L2 CacheThe MCPN750A SBC uses a backside L2 cache structure via the MPC750 processo

Memory Mapshttp://www.motorola.com/computer/literature 2-72supported. The Raven supports PowerPC processor external bus frequencies up to 66 MHz and P

Limited and Restricted Rights LegendIf the documentation contained herein is supplied, directly or indirectly, to the U.S. Government, the following n

2-8 Computer Group Literature Center Web SiteStartup and Operation2PCI ArbitrationThe MCPN750A has six potential local PCI bus masters:❏ the Raven ASI

Memory Mapshttp://www.motorola.com/computer/literature 2-92❏ The Processor 0 (processor self-interrupts)❏ Transfer Error Interrupt (from the Raven ASI

2-10 Computer Group Literature Center Web SiteStartup and Operation23. CompactPCI Push Button Reset (RST#) from the CompactPCI backplane.4. Watchdog t

Memory Mapshttp://www.motorola.com/computer/literature 2-112** If the Chip Reset Bit is set to a 1, the bit will clear itself after the chip reset is

2-12 Computer Group Literature Center Web SiteStartup and Operation2Software ResetsThe software is able to generate a 200 millisecond hard reset by pr

Memory Mapshttp://www.motorola.com/computer/literature 2-132Role of the Raven ASICBecause the PCI bus is little-endian, the Raven performs byte swappi

2-14 Computer Group Literature Center Web SiteStartup and Operation2

3-133PPCBugPPCBug OverviewThe PPCBug firmware is the layer of software just above the hardware. The firmware provides the proper initialization for th

3-2 Computer Group Literature Center Web SitePPCBug3❏ Breakpoint and tracing capabilities❏ A powerful assembler and disassembler useful for patching p

MPU, Hardware, and Firmware Initializationhttp://www.motorola.com/computer/literature 3-33Memory RequirementsPPCBug requires a maximum of 768KB of rea

viiContentsAbout This ManualSummary of Changes...xviiiOver

3-4 Computer Group Literature Center Web SitePPCBug37. Calculate the external bus clock speed of the MPU.8. Delays for 750 milliseconds.9. Determines

Using PPCBughttp://www.motorola.com/computer/literature 3-5326. Verifies the configuration data that is resident in NVRAM, and displays a warning me

3-6 Computer Group Literature Center Web SitePPCBug3What you key in is stored in an internal buffer. Execution begins only after you press the Return

Using PPCBughttp://www.motorola.com/computer/literature 3-73followed by the particular command mnemonic, as listed below, followed by a carriage retur

3-8 Computer Group Literature Center Web SitePPCBug3FORKWR Fork Idle MPU with RegistersGD Go Direct (Ignore Breakpoints)GEVBOOT Global Environment Var

Using PPCBughttp://www.motorola.com/computer/literature 3-93MENU System MenuMM Memory ModifyMMD Memory Map DiagnosticMS Memory SetMW Memory WriteNAB A

3-10 Computer Group Literature Center Web SitePPCBug3!CautionAlthough a command to allow the erasing and reprogramming of Flash memory is available to

Using PPCBughttp://www.motorola.com/computer/literature 3-113If you are in the debugger directory, the debugger prompt PPC1-Bug> displays, and all

3-12 Computer Group Literature Center Web SitePPCBug3Notes You may enter command names in either uppercase or lowercase.Some diagnostics depend on res

4-144CNFG and ENV CommandsOverviewYou can use the factory-installed debug monitor, PPCBug, to modify certain parameters contained in the PowerPC board

viiiCHAPTER 2 Startup and OperationIntroduction ...

4-2 Computer Group Literature Center Web SiteCNFG and ENV Commands4CNFG - Configure Board Information BlockUse this command to display and configure t

ENV - Set Environmenthttp://www.motorola.com/computer/literature 4-34ENV - Set EnvironmentUse the ENV command to view and/or configure interactively a

4-4 Computer Group Literature Center Web SiteCNFG and ENV Commands4Auto-Initialize of NVRAM Header Enable [Y/N] = Y?Network PReP-Boot Mode Enable [Y/N

ENV - Set Environmenthttp://www.motorola.com/computer/literature 4-54NVRAM Bootlist (GEV.fw-boot-path) Boot Enable [Y/N] = N? Note When enabled, the G

4-6 Computer Group Literature Center Web SiteCNFG and ENV Commands4Auto Boot Scan Enable [Y/N] = Y? Auto Boot Scan Device Type List = FDISK/CDROM/TA

ENV - Set Environmenthttp://www.motorola.com/computer/literature 4-74You may specify a string (filename) which is passed on to the code being booted.

4-8 Computer Group Literature Center Web SiteCNFG and ENV Commands4Network Auto Boot Controller LUN = 00?Refer to the PPCBug Firmware Package User’s M

ENV - Set Environmenthttp://www.motorola.com/computer/literature 4-94Memory Size Enable [Y/N] = Y? Memory Size Starting Address = 00000000?The default

4-10 Computer Group Literature Center Web SiteCNFG and ENV Commands4allowable ROMNAL setting is $0; the highest allowable is $F. The value to enter de

ENV - Set Environmenthttp://www.motorola.com/computer/literature 4-114The Serial Startup Codes can be displayed at key points in the initialization of

ixCHAPTER 4 CNFG and ENV CommandsOverview...

4-12 Computer Group Literature Center Web SiteCNFG and ENV Commands4Firmware Command Buffer[‘NULL’ terminates entry]?The Firmware Command Buffer conte

5-155Remote Start Via the PCI BusIntroductionThis chapter describes the remote interface provided by the firmware to the host CPU via the cPCI bus. Th

5-2 Computer Group Literature Center Web SiteRemote Start Via the PCI Bus5❏ A command data and result field. This field provides the data, if any, nee

Introductionhttp://www.motorola.com/computer/literature 5-35Command/response Register Description The 2155x SCRATCH7 register is used as the command/r

5-4 Computer Group Literature Center Web SiteRemote Start Via the PCI Bus5Bits 9 to 15 7 bit command option field. Each command specifies the particul

Introductionhttp://www.motorola.com/computer/literature 5-55Opcode 0x01: Write/Read Virtual RegisterThis command allows the host to access the content

5-6 Computer Group Literature Center Web SiteRemote Start Via the PCI Bus5Opcode 0x03: Write/Read Memory This command allows the host to Read or Write

Introductionhttp://www.motorola.com/computer/literature 5-75❏ VR0 specifies the beginning address of the area to checksum. VR1 specifies the number of

5-8 Computer Group Literature Center Web SiteRemote Start Via the PCI Bus5❏ The state of CPU registers R0 through R2, and R4 through R31 are indetermi

Introductionhttp://www.motorola.com/computer/literature 5-95Demonstration of the Host InterfaceThe following example demonstrates the use of PPCBug’s